1. Field of the Invention
The present invention relates to a method for manufacturing a silicon carbide semiconductor element using silicon carbide as a semiconductor material, and more particularly, to a silicon carbide semiconductor element in which a current flows from a front surface to a rear surface of a semiconductor substrate.
2. Background of the Related Art
Single-crystal silicon carbide (SiC) has a band gap or breakdown field strength that is significantly more than that of single-crystal silicon (Si). On-resistance which is resistance in an on state is inversely proportional to the cube of the breakdown field strength. Therefore, for example, in a silicon carbide semiconductor (four-layer periodic hexagonal: 4H—SiC) which has been widely used and is called a 4H type, it is possible to suppress the on-resistance to a few hundredths of the on-resistance of a silicon semiconductor.
Therefore, the silicon carbide semiconductor has the characteristics of a high radiation performance and high thermal conductivity and is expected as a next-generation low-loss power semiconductor element. For example, the silicon carbide semiconductor has been used to develop silicon carbide semiconductor elements with various structures, such as a Schottky barrier diode, MOSFET (insulated gate field effect transistor), a PN diode, an insulated gate bipolar transistor (IGBT), and a gate turn-off thyristor (GTO).
In the manufacture of the MOSFET using silicon carbide, it is necessary to form p and n regions using ion implantation since the diffusion coefficient of impurities in the silicon carbide is small. The p and n regions are formed through an ion implantation mask. A SiO2 film is generally used as the ion implantation mask since ion implantation is generally performed at a temperature of 300° C. or more. Dry etching which enables anisotropic etching is used to form an opening portion with a width of submicrons to a few microns in the SiO2 film. However, the surface of the silicon carbide semiconductor is physically or electrically damaged due to plasma or active species generated during etching, which causes breakdown when a high voltage is applied.
In order to suppress the damage caused during etching, a technique has been proposed in which positive and negative photoresists are used for an ion implantation mask, for example, see Japanese Patent No. 5014734 (Patent Document 1).
However, the technique using photoresist for the ion implantation mask has the following issues 1 to 3.
1. It is necessary to harden the resist at a high temperature. In this case, since the resist is shrunk, it is difficult to control dimensions. In particular, the aperture ratio of an opening portion of the resist varies depending on a position. As a result, the shrinkage percentage of the resist varies depending on the position.
2. The shape of the resist is changed during ion implantation due to an increase in temperature or exposure to plasma during ion implantation. As a result, the planar shape of an ion implantation region is changed or a forming position deviates from a desired position.
3. The resist closely adheres to the substrate due to a high temperature or exposure to plasma, which makes it difficult to remove the resist.
The invention has been made in view of the above-mentioned problems and an object of the invention is to provide a technique that prevents the damage of the surface of a silicon carbide semiconductor when an ion implantation mask is formed, easily form an opening portion of the ion implantation mask with high accuracy, and can improve a breakdown voltage.